#ifndef FTSCU_H
#define FTSCU_H

#include "unione_lite.h"

// ========================================================= 

#define FTSCU100_GCK_RISING

#define SCU_BASE    SYSC_PA_BASE

// Power up sequence configuration parameters 
#define FTSCU100_PCDCSR_DEF      0x1    //power control driving strength, undefine to turn-off

#define FTSCU100_PCPWRDN_DEF     0x00
#define FTSCU100_PCPWRUP_DEF     0x07
#define FTSCU100_DEBOUNCE_DEF    0x10


//-------------------------------------------
// Register Mapping parameters
//-------------------------------------------
#define SCU_BTUPSTS          0x00000000    // bootup staus Register
#define SCU_BTUPCTL          0x00000004    // bootup control Register
#define SCU_PWRCTL           0x00000008    // Power Control Register
#define SCU_PWRUPSEQ         0x0000000C    // Power Control Register

#define SCU_CHIPID           0x00000010    // Chip ID Register
#define SCU_VERID            0x00000014    // System Control Unit Version Register
#define SCU_STRAP            0x00000018    // Strap Status Register
#define SCU_OSCCTL           0x0000001C    // OSC Control Register
#define SCU_PWRMOD           0x00000020    // Power Mode Register
#define SCU_STATUS           0x00000024    // Interrupt Status Register
#define SCU_INTEN            0x00000028    // Interrupt Enable Register
#define SCU_PLLCTL           0x00000030    // PLL Control Register
#define SCU_TCICTR1          0x00000034    // TCI SSCG PLL control register1 
#define SCU_TCICTR2          0x00000038    // TCI SSCG PLL control register1 
#define SCU_TCICTR3          0x0000003C    // TCI SSCG PLL control register1 
#define SCU_PLL2CTL          0x00000040    // DLL Control Register
#define SCU_DLLCTL           0x00000044    // DLL Control Register
#define SCU_AHBCLK           0x00000050    // AHB Clock Gated Register
#define SCU_AHBCLKE          0x00000054    // AHB Clock Gated Extend Register
#define SCU_AHBCLK_SLP       0x00000058    // AHB Clock Gated Register for Sleep
#define SCU_AHBCLKE_SLP      0x0000005C    // AHB Clock Gated Extend Register for Sleep
#define SCU_APBCLK           0x00000060    // APB Clock Gated Register
#define SCU_APBCLKE          0x00000064    // APB Clock Gated Extend Register
#define SCU_APBCLK_SLP       0x00000068    // APB Clock Gated Register for Sleep
#define SCU_APBCLKE_SLP      0x0000006C    // APB Clock Gated Extend Register for Sleep
#define SCU_AXICLK           0x00000080    // AXI Clock Gated Register
#define SCU_AXICLKE          0x00000084    // AXI Clock Gated Extend Register
#define SCU_AXICLK_SLP       0x00000088    // AXI Clock Gated Register
#define SCU_AXICLKE_SLP      0x0000008C    // AXI Clock Gated Extend Register

#define SCU_LPI_MSK          0x00000090    // AXI Low Power Interface check mask
#define SCU_LPI_CKSTS        0x00000094    // AXI Low Power Interface clock status
#define SCU_LPI_ACTSTS       0x00000098    // AXI Low Power Interface active status in fail
#define SCU_LPI_ACKSTS       0x0000009c    // AXI Low Power Interface ack status in fail 
#define SCU_SCRPAD0          0x00000100    // System Control Unit Scratch Pad Register 0
#define SCU_SCRPAD1          0x00000104    // System Control Unit Scratch Pad Register 1
#define SCU_SCRPAD2          0x00000108    // System Control Unit Scratch Pad Register 2
#define SCU_SCRPAD3          0x0000010C    // System Control Unit Scratch Pad Register 3
#define SCU_SCRPAD4          0x00000110    // System Control Unit Scratch Pad Register 4
#define SCU_SCRPAD5          0x00000114    // System Control Unit Scratch Pad Register 5
#define SCU_SCRPAD6          0x00000118    // System Control Unit Scratch Pad Register 6
#define SCU_SCRPAD7          0x0000011C    // System Control Unit Scratch Pad Register 7
#define SCU_SCRPAD8          0x00000120    // System Control Unit Scratch Pad Register 8
#define SCU_SCRPAD9          0x00000124    // System Control Unit Scratch Pad Register 9
#define SCU_SCRPAD10         0x00000128    // System Control Unit Scratch Pad Register 10
#define SCU_SCRPAD11         0x0000012C    // System Control Unit Scratch Pad Register 11
#define SCU_SCRPAD12         0x00000130    // System Control Unit Scratch Pad Register 12
#define SCU_SCRPAD13         0x00000134    // System Control Unit Scratch Pad Register 13
#define SCU_SCRPAD14         0x00000138    // System Control Unit Scratch Pad Register 14
#define SCU_SCRPAD15         0x0000013C    // System Control Unit Scratch Pad Register 15

#define RTC_TIME1            0x00000200 
#define RTC_TIME2            0x00000204 
#define RTC_ALMTIME1         0x00000208
#define RTC_ALMTIME2         0x0000020C
#define RTC_CTRL             0x00000210
#define RTC_TRIM             0x00000214
//SCU
typedef struct SCUTYPE 
{
  unsigned int BTUPSTS          ; // @0  
  unsigned int BTUPCTL          ; // @4
  unsigned int PWRCTL           ; // @8 
  unsigned int PWRUPSEQ         ; // @C 
  unsigned int CHIPID           ; // @10 
  unsigned int VERID            ; // @14 
  unsigned int STRAP            ; // @18
  unsigned int OSCCTL           ; // @1C
  unsigned int PWRMOD           ; // @20 
  unsigned int STATUS           ; // @24 
  unsigned int INTEN            ; // @28 
  unsigned int RESERVE_2C       ; // @2C 
  unsigned int PLLCTL           ; // @30
  unsigned int TCICTR1          ; // @34 
  unsigned int TCICTR2          ; // @38
  unsigned int TCICTR3          ; // @3C
  unsigned int PLL2CTL          ; // @40 
  unsigned int DLLCTL           ; // @44
  unsigned int RESERVE_48       ; // @48 
  unsigned int RESERVE_4C       ; // @4C 
  unsigned int AHBCLK           ; // @50
  unsigned int AHBCLKE          ; // @54
  unsigned int AHBCLK_SLP       ; // @58
  unsigned int AHBCLKE_SLP      ; // @5C
  unsigned int APBCLK           ; // @60 
  unsigned int APBCLKE          ; // @64 
  unsigned int APBCLK_SLP       ; // @68 
  unsigned int APBCLKE_SLP      ; // @6C
  unsigned int RESERVE_70       ; // @70 
  unsigned int RESERVE_74       ; // @74 
  unsigned int RESERVE_78       ; // @78 
  unsigned int RESERVE_7C       ; // @7C 
  unsigned int AXICLK           ; // @80 
  unsigned int AXICLKE          ; // @84 
  unsigned int AXICLK_SLP       ; // @88 
  unsigned int AXICLKE_SLP      ; // @8C 
  unsigned int LPI_MSK          ; // @90 
  unsigned int LPI_CKSTS        ; // @94 
  unsigned int LPI_ACTSTS       ; // @98 
  unsigned int LPI_ACKSTS       ; // @9C 
} SCUTYPE;

typedef struct SCRPADTYPE {
  unsigned int SCRPAD0          ;  // @100
  unsigned int SCRPAD1          ;  // @104
  unsigned int SCRPAD2          ;  // @108
  unsigned int SCRPAD3          ;  // @10C
  unsigned int SCRPAD4          ;  // @110
  unsigned int SCRPAD5          ;  // @114
  unsigned int SCRPAD6          ;  // @118
  unsigned int SCRPAD7          ;  // @11C
  unsigned int SCRPAD8          ;  // @120
  unsigned int SCRPAD9          ;  // @124
  unsigned int SCRPAD10         ;  // @128
  unsigned int SCRPAD11         ;  // @12C
  unsigned int SCRPAD12         ;  // @130
  unsigned int SCRPAD13         ;  // @134
  unsigned int SCRPAD14         ;  // @138
  unsigned int SCRPAD15         ;  // @13C
} SCRPADTYPE;

typedef struct SCURTCTYPE {
  unsigned int TIME1            ;  // @200
  unsigned int TIME2            ;  // @204
  unsigned int ALMTIME1         ;  // @208
  unsigned int ALMTIME2         ;  // @20C
  unsigned int CTRL             ;  // @210
  unsigned int TRIM             ;  // @214
} SCURTCTYPE;

typedef enum wakeup_type_t{
	WAKEUP_BY_POWERON = 0,
	WAKEUP_BY_RTC,
	WAKEUP_BY_RESET_KEY,
	WAKEUP_BY_HVAD,
	WAKEUP_BY_WATCHDOG,
	WAKEUP_BY_UNKNOWN
}wakeup_type;

/**********************************************

functiones

***********************************************/

extern void uni_enter_sleep(void);
extern wakeup_type uni_get_boot_status(void);
extern int uni_reboot(void);
extern void uni_fcs(unsigned char PLL_EN,unsigned char CLKIN_MUX,unsigned char PLL_FR,unsigned char PLL_MS,unsigned char PLL_NS);
extern void uni_alarm_test(void);
#endif

